1. Field of the Invention
This invention relates to a circuit arrangement for interference-free storage of information in a programmable read only memory of the type in which storage elements consists of a circuit element and an interruptable resistor arranged between intersecting row lines and column lines, and in which information of one type is stored in a storage element by interrupting the resistor thereof with a predetermined current which is large compared with the current flowing during a reading operation.
2. Description of the Prior Art
In programmable read only memories, for example, in ECL technology, storage elements are arranged in matrix form between row lines and column lines. The storage elements comprise a circuit element and an interruptable resistor, herein called the memory resistor. The circuit element may be, for example, a transistor or a diode. The memory resistor comprises, for example, NiCr. (Mo, Gilbert: Reliability of NiCr "Fusible Links" used in PROM'S, Journal of Electronic Society, 120 (1973) Pages 1001-1003). If information is to be stored in the programmable read only memory, the memory resistors must be interrupted, or remain uninterrupted, corresponding to the information which is to be stored. For example, a binary "1" corresponds to an interrupted resistor; whereas, a binary ".phi." corresponds to an interrupted resistor. Interruption of the resistors takes place by sending a correspondingly large current therethrough. This is made possible by applying a correspondingly large voltage to the storage elements, and effecting a through connection of the circuit elements.
If, for example, the circuit elements consist of transistors, and if the memory resistor is located in the emitter path of this transistor, the interrupting current is obtained by applying a voltage to the base of the transistor, which voltage is of such a type that a current necessary in order to interrupt the memory resistor can flow via the collector-emitter path.
However, the resistance value of the memory resistor thereby constantly increases, and the voltage drop over the memory resistor steadily increases. The consequence is that the voltage on the column line connected to the memory resistor steadily increases in magnitude. However, there is then the risk that the unselected row lines and column lines are influenced by way of the inactive storage elements. This means that the inactive storage elements are likewise gradually rendered conductive and a portion of the current necessary to interrupt a memory resistor bypasses and flows through the unselected storage elements.